1. Field of the Invention
This invention relates to a semiconductor memory such as a ROM (Read Only Memory), and more particularly to a data protection circuit for protecting stored programs and data from unjust readout for attaining dead copies or the like.
2. Description of the Related Art
In order to protect stored programs and data from unjust readout for attaining dead copies or the like, a data protection circuit is sometimes provided in the ROM.
Conventionally, in a data protection circuit which is now put into practice or proposed, if a specified address is designated when ROM addresses are scanned, one of the following processes (1) to (5) is effected for readout data corresponding to addresses succeeding the specified address.
(1) Output of the readout data is inhibited. This system is disclosed in Japanese Patent Disclosure (KOKAI) No. S.58-94195, for example.
(2) The readout data is converted into erroneous data by modifying the data by use of the address signal and then output.
(3) The readout data is converted into semi-fixed erroneous data with desired regularity and then output.
(4) The readout data is inverted to create erroneous data and then output. This system is disclosed in Japanese Patent Disclosure (KOKAI) No. S.60-57598, for example.
(5) The readout data is processed together with output data of a random data generation circuit in an operation circuit, converted into erroneous data and then output. This system is disclosed in Japanese Patent Disclosure (KOKAI) No. H.2-85945, for example.
However, in the processing system such as the process (1), it is easy for a person who tries unjust data readout to determine a specified address at which inhibition of output of readout data is started. Therefore, the possibility that data can be easily read out by reading out data without accessing the specified address becomes high.
Further, in the processes (2) to (4), data read out after the specified address is converted into erroneous data when the specified address is designated, but it is relatively easy to determine a specified address at which output of erroneous data is started, and if the specified address is determined, data can be read out in the same manner as in the process (1). That is, in the processing system (2), even if data is converted into erroneous data by modifying the data with the address signal, it is possible for the person who tries unjust data readout to analyze output data by taking the scan address into consideration since the address at the time of scanning is known. Further, in the process (3), the specified address may be easily detected based on the regularity of the semi-fixed erroneous data. Also, in the process (4), the specified address may be easily detected since data which is not usually used will be contained in the erroneous data, and correct data can be reproduced by inverting the erroneous data again.
As described above, if the specified address at which output of erroneous data is started is determined, data may be analyzed. The possibility of analysis also occurs when a plurality of specified addresses at which output of erroneous data is started are set.
In the process (5), it is relatively difficult to determine the specified address, but the hardware becomes complicated in construction and the chip cost rises.
Therefore, in addition to the above processes, it is considered to destroy ROM data when the specified address of the ROM is accessed. However, even in this case, data may be acquired by preparing another sample, jumping the specified address thereof and making access thereto. Further, it is not desirable to destroy ROM data when taking it into consideration that the qualified users of the ROM may erroneously access the specified address.